SUN - CSA C22.2 No. 177, Clock-operated switches
Effective April 29, 2016
Effective Date (see Schedule below): April 29, 2016
Impact Statement: A review of all Listing Reports is necessary to determine which products comply with new/revised requirements and which products will require re-evaluation. NOTE: Effective immediately, this revised standard will be exclusively used for evaluation of new products unless the Applicant requests in writing that current requirements be used along with their understanding that their listings will be withdrawn on Effective Date noted above, unless the product is found to comply with new/revised requirements.
Overview of Changes: CSA C22.2 No. 177 3rd edition was issued to incorporate new testing and marking requirements for Electronic ballast, CFLs, and LED driver rated switch. Specific details of new/revised requirements are found in table below.
Processing Schedule: So that shipping of products with Listing Marks will not be interrupted, an approximate schedule has been established to ensure Listing Reports are found compliant by Effective Date:
- August 27, 2015 = 8 Month Report Review – Intertek will review all Reports. Update if compliance is verified or issue Findings Letter/Quote for any re-evaluations needed
- October 29, 2015 = 6 Month Quote Cut-off – Quotes returned for necessary re-evaluations
- March 28, 2016 = 30 Day Warning – Client advised of all non-compliant Reports to be Suspended
- April 29, 2016 = Effective Date – ATM Suspended for all non-compliant Reports
Fees: An initial review of Listing Report (s) will be covered by a direct billing project and will be invoiced at not more than $1000 per report.
Client Action Required:
Information - To assist our Engineer with review of your Listing Reports, please submit technical information in response to the new/revised paragraphs noted in the attached or explain why these new/revised requirements do not apply to your product (s).
Current Listings Not Active? – Please immediately identify any current Listing Reports or products that are no longer active and should be removed from our records. We will do this at no charge as long as Intertek is notified in writing prior to the review of your reports.
| Clause | Verdict | Comment | NC# |
|---|---|---|---|
| 5 | Info | Marking | |
| 5.1 | Info | Requirements | |
| 5.1.2 | New clause added; With reference to Clause 6.2.5, a clock-operated switch intended for general control of electronic ballasts, self-ballasted compact fluorescent lamps, and LED drivers shall be marked with “For Control of Electronic Ballast, CFLs, and LED drivers” or the equivalent. The marking shall be on the clock-operated switch or provided on the packaging or stuffer sheet. | ||
| 6 | Info | Tests | |
| 6.2 | Info | Rating | |
| 6.2.5 | New section added; Electronic ballast, CFLs, and LED driver rated switch | ||
| 6.2.5.1 | A clock operated switch intended for general use with electronic ballasts, self-ballasted compact fluorescent lamps, and LED drivers, having a rated current (steady state current) and rated voltage in accordance with Table 10 shall be marked in accordance with Clause 5.1.2. | ||
| 6.2.5.2 | The synthetic load described in Clauses 6.2.5.3 to 6.2.5.6 shall be used as the load. The overload, endurance, and temperature test sequence shall be completed with that load. | ||
| 6.2.5.3 | The test circuit, as shown in Figure 4, shall provide the inrush characteristics meeting or exceeding those characteristics defined in Table 10 in parallel with an AC resistive load based on the steady state current rating of the switch or lighting control being tested. The test method based on the circuit in Figure 4 applies to ballasts or electronic devices with a maximum allowable input capacitance as specified in Table 11 or shall not exceed peak inrush current values in Table 10. | ||
| 6.2.5.4 | The series coil values shall be adjusted based on the input line characteristics of the test laboratory to achieve the peak currents listed in Table 10. The series coil shall be sized such that it does not saturate during testing and shall be able to handle the resulting power dissipation with less than 10 °C temperature rise. Peak current and pulse width are illustrated in Figure 5. | ||
| 6.2.5.5 | The circuit shall provide a method to discharge the capacitor bank in between test cycles without influencing the performance of the device under test. This is accomplished by S2 and R2 in Figure 4. S2 shall be switched alternately with S1 and R2 shall be sized to allow for complete discharge of C during the period that S1 is open. | ||
| 6.2.5.6 | The circuit shall provide a method to discharge the capacitor bank in between test cycles without influencing the performance of the device under test. This is accomplished by S2 and R2 in Figure 4. S2 shall be switched alternately with S1 and R2 shall be sized to allow for complete discharge of C during the period that S1 is open. |
CUSTOMERS PLEASE NOTE: This Table and column "Verdict" can be used in determining how your current or future production is or will be in compliance with new/revised requirements.